1. BSDL parser

Main function readBSD reads JTAG device description from specified BSDL file and stores it in the structures PINS and BS. Structure BS contains different information about JTAG devices in scan chain. It includes JTAG commands, number of pins, device ID etc. Structure PINS has information about device pins, like pin names and its location in device scan chain.

2. Class TAP

This class behaves as a HAL (Hardware Abstraction Layer). It takes care about all communications with JTAG hardware like Xilinx Download Cable or add-on JTAG board and provides functions to control state of TDI, TMS, TCK and TDO lines for high-level class JTAG. The current version of class TAP supports only Xilinx Parallel Download cable with additional speed improvements through the functions updates() and realize(). You should setup global buffer size for these functions during the invoking of class consructor.

3. Class JTAG

This class provides functions for handling different states of main JTAG FSM (TAP cotroller). It has the following functions:
- RESET - move TAP-controller from any state to RESET
- IDLE - move TAP-controller from RESET state to Run/Idle state
- IRSCAN - scan-in specified JTAG-command
- DRSCAN - scan-in specified JTAG-data

4. Class VIRTEX

This class provides different functions for working with Xilinx Virtex FPGAs through the JTAG port. It should also work with Spartan2 device without any changes and with others families of Xilinx' FPGA with minor changes.The current version of class defines the following functions:
- GetDeviceID - returns IDCODE from connected device
- GetDeviceStatus - returns current status of device configuration block
- DownloadBitFile - allows to download specified bit file to Virtex